Pre-Silicon Validation Engineer
- Location: San Jose
- Job Type:Contract
Posted about 1 month ago
- Expiry Date: 29 May 2023
- Referral: email@example.com
Develops pre-Silicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.
Analyzes and uses results to modify testing. In this position, you will be a member of the Pre-silicon validation team in the Cloud Platform Group (CPG), responsible for functional correctness of next generation of memory buffer/controller for high end server platforms.
Your responsibility will include but not be limited to:
Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, developing BFMs (Bus Functional Model), running functional simulations, and debugging failures.
This position will focus more on FPGA pre Si validation work.
Possess a bachelor’s or master’s degree in electrical engineering and/or Computer Engineering and/or Computer Science with 4+ years of experience in the area of either hardware design or verification.
2+ years of pre-si verification work using a validation methodology such as UVM, Specman E, VMM, AVM.
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